Title :
An experimental toolchain based on high-level dataflow models of computation for heterogeneous MPSoC
Author :
Heulot, I. ; Desnos, K. ; Nezan, I. -F ; Pelcat, M. ; Raulet, M. ; Yviquel, H. ; Lagalaye, P.-L. ; Lann, I. -C Le
Author_Institution :
INSA, UEB, Rennes, France
Abstract :
A chain of three state-of-the-art tools is demonstrated to generate efficient code for Multi-Processors System-on-Chips (MPSoCs) from a high-level dataflow language. The experimental platform is based on a 5-core Texas Instruments OMAP4 heterogeneous MPSoC running an image processing application.
Keywords :
data flow analysis; image processing; microprocessor chips; system-on-chip; 5-core Texas Instruments OMAP4 heterogeneous MPSoC; high-level dataflow language; image processing application; multiprocessors system-on-chips; tool chain; Computational modeling; Computer architecture; Firing; Semantics; Signal processing; Signal processing algorithms; Streaming media; Data flow computing; Embedded software; Multicore processing; Signal processing;
Conference_Titel :
Design and Architectures for Signal and Image Processing (DASIP), 2012 Conference on
Conference_Location :
Karlsruhe
Print_ISBN :
978-1-4673-2089-4
Electronic_ISBN :
978-2-9539987-4-0
