DocumentCode
580532
Title
Foreground detection and image segmentation in a flexible ASVP platform for FPGAs
Author
Bartosinski, Roman ; Danek, Martin ; Sykora, Jaroslav ; Kohout, Lukas ; Honzik, Petr
Author_Institution
Dept. of Signal Process., Inst. of Inf. Theor. & Autom. (UTIA), Prague, Czech Republic
fYear
2012
fDate
23-25 Oct. 2012
Firstpage
1
Lastpage
2
Abstract
This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640×480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen.
Keywords
cameras; field programmable gate arrays; image resolution; image segmentation; object detection; FPGA; LCD screen; application-specific vector processor; embedded smart camera; flexible ASVP platform; foreground detection; frequency 100 MHz; image segmentation; low-level image processing; resolution pixels; Algorithm design and analysis; Computer architecture; Field programmable gate arrays; Hardware; Image resolution; Scheduling; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Architectures for Signal and Image Processing (DASIP), 2012 Conference on
Conference_Location
Karlsruhe
Print_ISBN
978-1-4673-2089-4
Electronic_ISBN
978-2-9539987-4-0
Type
conf
Filename
6385413
Link To Document