Title :
Negative Bias Temperature Stress Reliability in Trench-Gated P-Channel Power MOSFETs
Author :
Tallarico, Andrea Natale ; Magnone, Paolo ; Barletta, G. ; Magri, A. ; Sangiorgi, Enrico ; Fiegna, Claudio
Author_Institution :
Dept. of Electr., Univ. of Bologna, Cesena, Italy
Abstract :
In this paper, we present the results of an experimental analysis of the degradation induced by negative-bias temperature stress (NBTS) in trench-gated p-channel power MOSFETs. Threshold voltage and carrier mobility are affected by hole trapping in bulk oxide and interface-state generation due to oxide electric field effects. A fast recovery phase occurs when gate bias is removed or reduced in order to measure the threshold voltage. Hence, various techniques for evaluating threshold voltage shift are adopted in order to highlight the differences in the dynamics of degradation. We investigate the influence of gate bias levels during the stress. Moreover, with the help of recovery studies, we try to distinguish the impact of interface-state generation and charge trapping on the NBTS degradation.
Keywords :
carrier mobility; hole traps; negative bias temperature instability; power MOSFET; semiconductor device reliability; NBTS degradation; bulk oxide; carrier mobility; charge trapping; fast recovery phase; gate bias levels; hole trapping; interface-state generation; negative bias temperature stress reliability; oxide electric field effects; threshold voltage shift; trench-gated P-channel power MOSFET; Degradation; Logic gates; Stress; Stress measurement; Temperature measurement; Threshold voltage; Voltage measurement; Negative-bias temperature stress; high-temperature forward bias; interface-state generation; oxide trapping/de-trapping charge; power MOSFET; recovery mechanisms; trench technology;
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2014.2308580
