DocumentCode
580943
Title
Novel test detection to improve simulation efficiency — A commercial experiment
Author
Chen, Wen ; Sumikawa, Nik ; Wang, Li-C ; Bhadra, Jayanta ; Feng, Xiushan ; Abadir, Magdy S.
Author_Institution
Univ. of California, Santa Barbara, Santa Barbara, CA, USA
fYear
2012
fDate
5-8 Nov. 2012
Firstpage
101
Lastpage
108
Abstract
Novel test detection is an approach to improve simulation efficiency by selecting novel tests before their application [1]. Techniques have been proposed to apply the approach in the context of processor verification [2]. This work reports our experience in applying the approach to verifying a commercial processor. Our objectives are threefold: to implement the approach in a practical setting, to assess its effectiveness and to understand its challenges in practical application. The experiments are conducted based on a simulation environment for verifying a commercial dual-thread low-power processor core. By focusing on the complex fixed-point unit, the results show up to 96% saving in simulation time. The main limitation of the implementation is discussed based on the load-store unit with initial promising results to show how to overcome the limitation.
Keywords
electronic engineering computing; integrated circuit modelling; integrated circuit testing; microprocessor chips; commercial dual thread low power processor core; commercial experiment; commercial processor; simulation efficiency improvement; test detection; Accuracy; Assembly; Buildings; Computational modeling; Kernel; Load modeling; Support vector machines;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2012 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Type
conf
Filename
6386595
Link To Document