Construction of rectilinear Steiner minimum trees with slew constraints over obstacles

This work studies the problem of finding a rectilinear Steiner minimum tree (RSMT) for a set of given terminals in the presence of obstacles. In modern VLSI designs, obstacles usually block the device layer and a fraction of metal layers. Therefore, routing wires on top of obstacles is possible. However, if a long wire is routed over an obstacle, there will be signal integrity problems because buffers cannot be placed on top of any obstacle. To tackle this problem, we impose slew constraints on the interconnects that are routed over an obstacle. This is called the obstacle-avoiding rectilinear Steiner minimum trees (OARSMT) problem with slew constraints over obstacles. In this paper, we first analyze an optimal solution to this problem and show that the tree structures over obstacles with slew constraints will follow some very simple forms. Based on this observation, we propose an algorithm to find an optimal solution embedded in the extended Hanan grid [1]. The solutions can guarantee the interconnect performance and avoid post-routing electrical fixups due to slew violations. We also show that our algorithm achieves over 800 times speedup and is able reduce nearly 5% routing resources on average in comparison with the state-of-the-art optimal OARSMT algorithm.