DocumentCode :
580968
Title :
Scaling the “Memory Wall”: Designer track
Author :
Lu, Shih-Lien ; Karnik, Tanay ; Srinivasa, Ganapati ; Chao, Kai-Yuan ; Carmean, Doug ; Held, Jim
Author_Institution :
Intel Corp. Hillsboro Oregon, Hillsboro, OR, USA
fYear :
2012
fDate :
5-8 Nov. 2012
Firstpage :
271
Lastpage :
272
Abstract :
DRAM has been the technology for computer main memory since Intel released the first commercial DRAM chip (i1103) in 1970. As technology scales and demand for memory performance, it seems DRAM is facing several challenges. Many other memory technologies are anticipated to replace it but none has emerged as a clear winner thus far. In this paper we post the question. Is it possible to re-examine the design of DRAM to continue its life for another decade at least?
Keywords :
DRAM chips; integrated circuit design; DRAM chip; Intel; memory wall scaling; Computer architecture; Computers; DRAM chips; Power demand; Stacking; USA Councils; Memory; insert;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2012 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Type :
conf
Filename :
6386620
Link To Document :
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