A three-stage CMOS OP amplifier with a dynamic switching bias circuit

This paper presents a high-speed CMOS OP Amp with a dynamic switching bias circuit capable of processing video signals of over 2 MHz with slight nonlinearity and low dissipated power. The OP Amp, capable of operating at 10 MHz dynamic switching rate, was designed and showed through simulations a dissipated power of 60% of that in conventional continuous operation. A switched capacitor (SC) non-inverting amplifier with a gain of 2 employing this OP Amp and its high-speed 10 MHz dynamic switching operation, capable of processing video signals, was demonstrated. By increasing the switching duty ratio to 70%, its power dissipation decreased to 62% of that in normal operation. The output voltage inaccuracy for a SC amplifier with a gain of below 2 was below 1 % and mainly caused by the static nonlinearity of the OP Amp. This circuit configuration should be very useful in realizing low-power wide-band signal processing ICs.