A high speed encoder for a 5GS/s 5 bit flash ADC

Author

Varghese, G.T. ; Mahapatra, Kamala Kanta

Author_Institution

Dept. of Electron. & Commun. Eng., Nat. Inst. of Technol., Rourkela, India

fYear

2012

fDate

26-28 July 2012

Firstpage

1

Lastpage

5

Abstract

The present investigation proposes an efficient high speed encoding scheme intended for a 5GS/s 5 bit flash analog to digital converter. The designing of a thermometer code to binary code is one of the challenging issues in the design of a high speed flash ADC. An encoder circuit in this paper translates the thermometer code into the intermediate gray code to reduce the effects of bubble errors. To increase the speed of the encoder, the implementation of the encoder through pseudo dynamic CMOS logic is presented. The proposed encoder is designed using 90nm technology at 1.2V power supply using CADENCE tool. The simulation results shown for a sampling frequency of 5GHz and the average power dissipation of the encoder is 1.919mW.

Keywords

CMOS logic circuits; Gray codes; analogue-digital conversion; binary codes; Cadence tool; binary code; bubble error effect; encoder circuit; flash analog-to-digital converter; frequency 5 GHz; high speed encoder; high speed encoding scheme; high speed flash ADC; intermediate Gray code; power 1.919 mW; pseudo dynamic CMOS logic; size 90 nm; thermometer code; voltage 1.2 V; word length 5 bit; Analog to digital converter; Flash ADC; Pseudo dynamic CMOS logic;

fLanguage

English

Publisher

ieee

Conference_Titel

Computing Communication & Networking Technologies (ICCCNT), 2012 Third International Conference on

Conference_Location

Coimbatore

Type

conf

DOI

10.1109/ICCCNT.2012.6396034

Filename

6396034