DocumentCode
585781
Title
MAZENOC: Novel approach for fault-tolerant NOC routing
Author
Wächter, Eduardo Weber ; Moraes, Fernando Gehm
Author_Institution
FACIN, PUCRS, Porto Alegre, Brazil
fYear
2012
fDate
12-14 Sept. 2012
Firstpage
364
Lastpage
369
Abstract
This paper presents an original approach to define a path between two routers in a NoC with faulty routers. Current state-of-the art adopts non-scalable solutions, using tables to store paths, or distributed approaches that keep the status of neighbor routers. The proposed approach searched its foundations in the firsts routing algorithms for VLSI circuits, using a three-step process: seek new path, backtrack the path, store the new path. Results demonstrate the effectiveness of the approach, with the algorithm being able to find the path between routers in complex scenarios, with a small area overhead over a baseline router.
Keywords
VLSI; fault tolerance; network routing; network-on-chip; MAZENOC; VLSI circuits; baseline router; fault-tolerant NOC routing; faulty routers; neighbor routers; three-step process; Circuit faults; Fault tolerance; Fault tolerant systems; IP networks; Routing; System recovery;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2012 IEEE International
Conference_Location
Niagara Falls, NY
ISSN
2164-1676
Print_ISBN
978-1-4673-1294-3
Type
conf
DOI
10.1109/SOCC.2012.6398333
Filename
6398333
Link To Document