DocumentCode :
58657
Title :
Nano-power tunable bump circuit using wide-input-range pseudo-differential transconductor
Author :
Junjie Lu ; Tan Yang ; Jahan, Md Sarwar ; Holleman, Jeremy
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of Tennessee, Knoxville, TN, USA
Volume :
50
Issue :
13
fYear :
2014
fDate :
June 19 2014
Firstpage :
921
Lastpage :
923
Abstract :
An ultra-low-power tunable bump circuit is presented. It incorporates a novel wide-input-range tunable pseudo-differential transconductor linearised using the drain resistances of saturated transistors. Measurement results show that the transconductor has a 5 V differential input range with <;20% of linearity error. The bump circuit demonstrates tunability of the centre, width and height, consuming 18.9 nW power from a 3 V supply, occupying 988 μm2 in a 0.13 μm CMOS process.
Keywords :
CMOS integrated circuits; circuit tuning; low-power electronics; nanoelectronics; power transistors; CMOS process; drain resistances; linearity error; nano-power tunable bump circuit; power 0.13 nW; power 18.9 nW; saturated transistors; ultra-low-power tunable bump circuit; voltage 3 V; voltage 5 V; wide-input-range pseudodifferential transconductor;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el.2014.0920
Filename :
6838835
Link To Document :
بازگشت