Wideband RF detector design for high performance on-chip test

Author

Quoc-Tai Duong ; Dabrowski, Jerzy J.

Author_Institution

Dept. of Electr. Eng., Linkoping Univ., Linkoping, Sweden

fYear

2012

fDate

12-13 Nov. 2012

Firstpage

1

Lastpage

4

Abstract

A wideband, high dynamic range RF amplitude detector design aimed at on-chip test is presented. Boosting gain and sub-ranging techniques are applied to the detection circuit to increase gain over the full range of input amplitudes without compromising the input impedance. Followed by a variable gain amplifier (VGA) and a 9-bit A/D converter the RF detector system, designed in 65 nm CMOS, achieves in simulation the minimum detectable signal of -58 dBm and 63 dB dynamic range over 0.5 GHz - 9 GHz band with input impedance larger than 4 kΩ. The detector is intended for on-chip calibration and the attained specifications put it among the reported state-of-the-art solutions.

Keywords

CMOS integrated circuits; UHF amplifiers; UHF detectors; UHF integrated circuits; analogue-digital conversion; calibration; circuit simulation; integrated circuit measurement; integrated circuit testing; microwave amplifiers; microwave detectors; microwave integrated circuits; wideband amplifiers; A/D converter; CMOS process; VGA; boosting gain technique; frequency 0.5 GHz to 9 GHz; gain 63 dB; high performance on-chip test; input impedance; on-chip calibration; size 65 nm; subranging technique; variable gain amplifier; wideband high dynamic range RF amplitude detector design; word length 9 bit; CMOS integrated circuits; Calibration; Detectors; Dynamic range; Gain; Radio frequency; System-on-a-chip; BIST; DfT; RF amplitude detector;

fLanguage

English

Publisher

ieee

Conference_Titel

NORCHIP, 2012

Conference_Location

Cpenhagen

Print_ISBN

978-1-4673-2221-8

Electronic_ISBN

978-1-4673-2222-5

Type

conf

DOI

10.1109/NORCHP.2012.6403140

Filename

6403140