• DocumentCode
    58774
  • Title

    IBIS Simulation Using the Latency Insertion Method (LIM)

  • Author

    Schutt-Aine, J.E. ; Ping Liu ; Jilin Tan ; Varma, Ambrish

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Illinois, Urbana, IL, USA
  • Volume
    3
  • Issue
    7
  • fYear
    2013
  • fDate
    Jul-13
  • Firstpage
    1228
  • Lastpage
    1236
  • Abstract
    This paper presents an approach for the transient simulation of I/O buffers described by IBIS models. Using the latency insertion method, a formulation can be obtained for the transient behavior of IBIS models combined with external circuitry. The formulation offers better convergence than traditional Newton-Raphson methods and is therefore more robust. The method also implements the BIRD95 and BIRD98 updates that account for predriver current, simultaneous switching noise, and gate modulation effects. Several computer simulations are performed to validate the method.
  • Keywords
    Newton-Raphson method; circuit simulation; I/O buffers; IBIS model; IBIS simulation; Newton-Raphson method; computer simulation; gate modulation effect; latency insertion method; simultaneous switching noise; transient behavior; transient simulation; Input/output buffer information specification (IBIS); latency insertion method (LIM); simultaneous switching noise (SSN); transient simulation;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2013.2258716
  • Filename
    6515598