A low power discreet time sigma delta modulator in 50nm CMOS digital

Author

Ducu, Dragos ; Manolescu, Andrei

Author_Institution

Microchip Technol., Bucharest, Romania

fYear

2012

fDate

25-27 Oct. 2012

Firstpage

1

Lastpage

4

Abstract

Sigma delta modulators (ΣΔMs) form part of the core of today´s mixed-signal designs. The ongoing research on these devices shows the potential of ΣΔ data converters as a promising candidate for high-speed, high-resolution, and low power mixed-signal interfaces. This paper presents a new circuit realization for discreet time sigma delta modulator. The modulator is designed in 50nm CMOS digital technology and features low power consumption (<;100uW), low supply voltage (±1.2), and wide dynamic range (>;70db). The performance of the circuits was demonstrated using HSPICE at low voltage operation of ±1.2V. The modulator was used to design 11bit second order ΣΔ ADC. This architecture is an attractive approach to implementing precision A/D convertors in scaled digital VLSI technologies.

Keywords

CMOS digital integrated circuits; VLSI; discrete time systems; low-power electronics; mixed analogue-digital integrated circuits; sigma-delta modulation; ΣΔ data converters; CMOS digital technology; HSPICE; high-resolution mixed-signal interfaces; high-speed mixed-signal interfaces; low power consumption; low power discreet time sigma delta modulator; low power mixed-signal interfaces; low supply voltage; mixed-signal designs; scaled digital VLSI technology; second order ΣΔ ADC; size 50 nm; wide dynamic range; word length 11 bit; CMOS integrated circuits; CMOS technology; Clocks; Modulation; Noise; Operational amplifiers; Sigma delta modulation;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied and Theoretical Electricity (ICATE), 2012 International Conference on

Conference_Location

Craiova

Print_ISBN

978-1-4673-1809-9

Type

conf

DOI

10.1109/ICATE.2012.6403384

Filename

6403384