• DocumentCode
    589475
  • Title

    A DLL-based FSK demodulator for 5.8GHz DSRC/ETC RF receiver

  • Author

    Hung-Wen Lin ; Hsin-Lin Hu ; Wu-Wei Lin

  • Author_Institution
    YuanZe Univ., Jhongli, Taiwan
  • fYear
    2012
  • fDate
    4-7 Nov. 2012
  • Firstpage
    116
  • Lastpage
    119
  • Abstract
    This paper presents a DLL-based low-IF FSK demodulator for DSRC system. As compare to the tapper-buffer-based delay line, the oscillator-based delay line provides a longer delay time but occupies a lower hardware overhead. In a 0.18um CMOS technology, the FSK-demodulator operates at 40MHz of IF and ±150kHz of frequency deviation, consumes 3.7mW under 1.8V and occupies a core area of 0.04mm2.
  • Keywords
    CMOS integrated circuits; demodulators; frequency shift keying; microwave receivers; radio receivers; CMOS technology; DLL; DSRC/ETC RF receiver; FSK demodulator; frequency 40 MHz; frequency 5.8 GHz; frequency shift keying; oscillator-based delay line; power 3.7 mW; size 0.18 mum; tapper-buffer-based delay line; voltage 1.8 V; DLL; DSRC; Demodulator; ETC; FSK; Low IF;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference (ISOCC), 2012 International
  • Conference_Location
    Jeju Island
  • Print_ISBN
    978-1-4673-2989-7
  • Electronic_ISBN
    978-1-4673-2988-0
  • Type

    conf

  • DOI
    10.1109/ISOCC.2012.6407053
  • Filename
    6407053
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=589475