Title :
Dynamic load balancing algorithm for system on chip
Author :
Shinwon Lee ; Meka, V. ; Mingu Jeon ; Nagoo Sung ; Jeongnam Youn
Author_Institution :
Syst. LSI Bus., Samsung Electron., Yongin, South Korea
Abstract :
Load balancing is a method that improves performance of a system through efficient distribution of load among the resources (HW accelerators & cores) of the system. Various load balancing algorithm have been introduced already, but there is no algorithm that considered the important properties of system on chip (SOC). In this paper, we introduced a novel load balancing algorithm for system on chip (SOC). The proposed algorithm introduces a quantitative approach that dynamically computes the performance score (based on pre-measured response time & power consumption primitives and the current system frequency) of each available resource and also computes the workload of each job-task on the SOC. Based on the computed performance score and workload of a job-task, the algorithm schedules the job-task on best possible resource of the SOC. The proposed load balancing algorithm is evaluated on a SOC through simulation and found superior results compared to the traditional load balancing approaches.
Keywords :
resource allocation; system-on-chip; HW accelerators; SOC; dynamic load balancing algorithm; load distribution; system on chip; Algorithm design and analysis; Heuristic algorithms; Load management; Power demand; System-on-a-chip; Time factors; Time frequency analysis; Dynamic voltage and frequency scaling(DVFS); Load balancing; Load of resource; Power consumption; Response time; System on chip(SOC); Workload;
Conference_Titel :
SoC Design Conference (ISOCC), 2012 International
Conference_Location :
Jeju Island
Print_ISBN :
978-1-4673-2989-7
Electronic_ISBN :
978-1-4673-2988-0
DOI :
10.1109/ISOCC.2012.6407076