Title :
New power delivery scheme for 3D ICs to minimize simultaneous switching noise for high speed I/Os
Author :
Zhang, David C. ; Swaminathan, Madhavan ; Huh, Sam
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
Simultaneous switching noise is a detrimental issue in high speed digital systems. In this paper, we utilize power transmission line based design and current steering to minimize power supply noise, eye height and jitter penalties.
Keywords :
integrated circuit design; integrated circuit noise; jitter; power supply circuits; three-dimensional integrated circuits; 3D IC; current steering; eye height; high speed I-O; high speed digital system; jitter penalty; power delivery scheme; power supply noise minimization; power transmission line utilization; simultaneous switching noise minimization; Impedance; Integrated circuit modeling; Jitter; Noise; Power supplies; Power transmission lines; Transmission line measurements; Power delivery network (PDN); power transmission line (PTL); simultaneous switching noise (SSN);
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2012 IEEE 21st Conference on
Conference_Location :
Tempe, AZ
Print_ISBN :
978-1-4673-2539-4
Electronic_ISBN :
978-1-4673-2537-0
DOI :
10.1109/EPEPS.2012.6457849
