Work in progress: Student lab on graphics cards´ multi buffer architecture implemented in an FPGA

This paper presents a laboratory assignment for a module in VHDL programming. The purpose of the laboratory is to demonstrate sophisticated, state of the art solutions to current challenges in digital hardware design. The goal is to avoid setting up tasks that have a complexity beyond what the students are able to handle, but at the same time keeping the essential parts of the solution. The laboratory assignment presents to the students the principal solution to a problem or challenge, and the students´ task is to develop a practical implementation of this solution in an FPGA, with I/O units connected, that demonstrates the effectiveness of the solution.