4 Watt, 45% bandwidth Si-LDMOS high linearity power amplifier for modern wireless communications systems

In this contribution, a Si-LDMOS transistor is used to design a power amplifier (PA) in a broad frequency band covering a number of modern wireless communications systems. The design, implementation, and experimental results of 4 W wideband Si-LDMOS PA are presented. A method based on source/load--pull characterization has been used to extract optimum source and load impedances over the desired bandwidth. Following this, a systematic approach to design wideband matching network is suggested. In the frequency band 1.7-2.7 GHz, 3.4 - 4.0 W output power and 25 % drain efficiency were achieved. The 3^rd-order intermodulation distortion (IMD3) performance of the designed PA is evaluated by providing a two-tone signal to the amplifier. At two-tone output power of 1 W, IMD3 of around -30 dBc was measured over the design band.