Co-simulation of Via model on high-speed circuit

Co-simulation of the theoretical via model is presented by using HFSS and CST, with the sweep frequency ranges from 1GHz to 10GHz. The impact of structure parameters on signal integrity is analyzed, including the via diameter, the ratio of inner and outer diameter, the via length and the relative permittivity of substrate. We select f=5GHz as the RF validation frequency. The simulation results show that inner radius using no more than 10 mil, outer radius using no more than 25 mil and through-hole length using less than 55 mil can guarantee the continuity of impedance and cost lower insertion loss. The optimal ratio between inner diameter and outer diameter is 1 to 2.3. Above all, the model is practical and effective. It´s a good guidance for the design of high-frequency Printed Circuit Board.