Designing of the digital voice recording system on SOPC

Author

Hailin Yuan ; Pingping Xu

Author_Institution

Dept. of Comput. Sci., Hubei Inst. for Nat., Enshi, China

fYear

2012

fDate

18-20 Oct. 2012

Firstpage

1213

Lastpage

1215

Abstract

This paper introduced a scheme of design an embedded digital voice recording system on SOPC technology. By configure NiosII soft core CPU and some corresponding interface modules on a PFGA to construct an embedded system´ s hardware, and combine software programming to controlling audio encode and decode IC WM8731 and SDRAM system has realized A/D, D/A conversion, saving and replaying of audio signal. Due to using the SOPC and DMA technology, the system has high design flexibility and good expansibility and quick data processing speed.

Keywords

DRAM chips; analogue-digital conversion; audio coding; audio recording; digital-analogue conversion; embedded systems; microprocessor chips; system-on-chip; voice equipment; DMA technology; NiosII soft core CPU; PFGA; SDRAM system; SOPC technology; analog-digital conversion; audio decoding; audio encoding; digital-analog conversion; embedded digital voice recording system; interface module; software programming; system on programmable chip; Embedded systems; Field programmable gate arrays; Hardware; SDRAM; Shift registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Computational Intelligence (ICACI), 2012 IEEE Fifth International Conference on

Conference_Location

Nanjing

Print_ISBN

978-1-4673-1743-6

Type

conf

DOI

10.1109/ICACI.2012.6463369

Filename

6463369