Title :
CEMS-PG: A parametrized algorithm for balanced partitioning and wakeup of power gated circuits
Author :
Farah, S.N. ; Bayoumi, Magdy A.
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA
Abstract :
Power gating can be a source of disturbances detrimental to IC robustness and response time. This work introduces Current-Equalized Multi-Stage Power Gating (CEMS-PG), a parameterized algorithm for finding an efficient wakeup approach given a maximum tolerable fluctuation in the power distribution network. Applying both partitioning and scheduling, CEMS-PG efficiently divides a power gated circuit into partitions with near-equal surge currents, making them suitable for an improved form of Staggered-Phase Damping. Our simulations show up to 44% improvement in wakeup time and 78% in peak noise, offering minimal compromise between the two.
Keywords :
integrated circuit design; CEMS-PG; IC robustness; balanced partitioning; current-equalized multistage power gating; maximum tolerable fluctuation; near-equal surge currents; parametrized algorithm; peak noise; power distribution network; power gated circuits; response time; scheduling; staggered-phase damping; wakeup approach; wakeup time; Delay; Integrated circuit modeling; Noise; Oscillators; Partitioning algorithms; RLC circuits; Surges;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4673-1261-5
Electronic_ISBN :
978-1-4673-1259-2
DOI :
10.1109/ICECS.2012.6463531
