DocumentCode
596936
Title
Peak power estimation using activity measured on emulator
Author
Berthet, C. ; Georgelin, P. ; Ntyame, J. ; Raffin, M.
Author_Institution
STMicroelectron., Grenoble, France
fYear
2012
fDate
9-12 Dec. 2012
Firstpage
440
Lastpage
443
Abstract
Peak power analysis is a critical requirement for the design of robust System-on-Chips (SoCs). Typically power estimation relies either on “rule of thumb” activity rates or on limited simulation runs that do not guarantee a real silicon worst case estimate. Rather, we have developed and implemented a method based on extracting activity data from an emulator box running a typical real-life application with suitable instrumentation. The search-and-refine method focuses on the time window exhibiting the highest activity. The time window is in a second step analyzed using Back-End power estimation tools. Results on a typical block of a SoC are presented and discussed.
Keywords
elemental semiconductors; estimation theory; instrumentation; silicon; system-on-chip; Si; SoC; activity data; activity rates; back-end power estimation tools; emulator box; limited simulation runs; peak power analysis; peak power estimation; real silicon worst case estimate; real-life application; robust system-on-chips; search-and-refine method; suitable instrumentation; time window; Emulation; Estimation; Instruments; Power demand; Power measurement; Silicon; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on
Conference_Location
Seville
Print_ISBN
978-1-4673-1261-5
Electronic_ISBN
978-1-4673-1259-2
Type
conf
DOI
10.1109/ICECS.2012.6463655
Filename
6463655
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