Title :
Channel mismatch background calibration for pipelined time interleaved ADCs
Author :
Mrassy, A. ; Dessouky, Mohamed
Author_Institution :
Ain Shams Univ., Cairo, Egypt
Abstract :
This paper presents a background calibration technique for channel mismatch errors in pipelined time interleaved ADCs. These mismatches include gain and offset mismatches for pipelined sub-ADC´s stages and the time skew error for each sub-ADC. The presented calibration technique is based on least mean-square adaptive filtering and requires an extra slow but accurate sub-ADC. The technique was implemented on an FPGA to evaluate its resource utilization. Simulation results demonstrate a 40 dB improvement in the measured SNR.
Keywords :
adaptive filters; analogue-digital conversion; field programmable gate arrays; least squares approximations; FPGA; channel mismatch background calibration; channel mismatch errors; gain mismatches; least mean-square adaptive filtering; offset mismatches; pipelined sub-ADC stages; pipelined time interleaved ADC; resource utilization; time skew error; Adaptive filters; Calibration; Field programmable gate arrays; Mathematical model; Signal to noise ratio; Simulation; Timing;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4673-1261-5
Electronic_ISBN :
978-1-4673-1259-2
DOI :
10.1109/ICECS.2012.6463673
