Performance evaluation for FPGA-based processing of tree-like structures

The paper evaluates tree-based implementations of data sorting algorithms in FPGA circuits using hierarchical finite state machine (HFSM) as a computational core. We focus here on experiments which show effectiveness of sorting algorithms over data structures represented in form of N-ary trees (N≥2). The presented results compare different types of data representation and processing in terms of performance and memory requirements. It is shown that using advanced FPGAs and the proposed address-based methods the number of sorted items with size 32-64 bits can reach 2³².