Title :
Spin wave nanofabric update
Author :
Alzate, Juan G. ; Upadhyaya, Parag ; Lewis, Marlon ; Nath, Jonathan ; Lin, Y.T. ; Wong, Kai-Kit ; Cherepov, S. ; Amiri, Pedram Khalili ; Wang, K.L. ; Hockel, J. ; Bur, A. ; Carman, Gregory P. ; Bender, S. ; Tserkovnyak, Y. ; Zhu, Junan ; Chen, Y.-J. ; Kri
Author_Institution :
Electr. Eng. Dept., Univ. of California-Los Angeles, Los Angeles, CA, USA
Abstract :
We provide a progress update on the spin wave nanofabric. The nanofabric comprises magneto-electric cells and spin wave buses serving for spin wave propagation. The magneto-electric cells are used as the input/output ports for information transfer between the charge and the spin domains, while information processing inside the nanofabric is via spin waves only. Information is encoded into the phase of the propagating spin wave, which makes it possible to utilize waveguides as passive logic elements and take the advantage of using wave superposition for data processing. This provides a fundamental advantage over the conventional transistor-based logic circuitry allowing for functional throughput enhancement and power consumption minimization at the same time. We present recent accomplishments in the magneto-electric element development and integration with spin wave buses. In particular, we show the excitation and detection of the spin waves via multiferroic elements. In addition, we present different approaches to magnonic logic circuit engineering and provide the comparison with CMOS by mapping the designs to 45nm NANGATE standard cell libraries. The estimates show more than 40X power reduction and 53X area reduction for magnonic circuits. These results illustrate the potential advantages over conventional charge based electronics that could be a route to beyond CMOS logic circuitry.
Keywords :
CMOS logic circuits; magnetoelectronics; CMOS logic circuitry; NANGATE standard cell library; data processing; functional throughput enhancement; information transfer; magneto-electric cell; magneto-electric element development; magnonic circuit; magnonic logic circuit engineering; multiferroic element; passive logic element; power consumption minimization; size 45 nm; spin wave buses; spin wave nanofabric update; spin wave propagation; transistor-based logic circuitry; wave superposition; waveguide; CMOS integrated circuits; Extraterrestrial measurements; Logic gates; Magnetic resonance imaging; Magnetic tunneling; Phase measurement; Substrates; magnonic logic; multiferroic; spin wave;
Conference_Titel :
Nanoscale Architectures (NANOARCH), 2012 IEEE/ACM International Symposium on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4503-1671-2