DocumentCode
597238
Title
Memristor-based reservoir computing
Author
Kulkarni, M.S. ; Teuscher, Christof
Author_Institution
Dept. of Electr. & Comput. Eng., Portland State Univ., Portland, OR, USA
fYear
2012
fDate
4-6 July 2012
Firstpage
226
Lastpage
232
Abstract
As feature-size scaling and “Moore´s Law” in integrated CMOS circuits further slows down, attention is shifting to computing by non-von Neumann and non-Boolean computing models. Reservoir computing (RC) is a new computing paradigm that allows to harness the intrinsic dynamics of a “reservoir” to perform useful computations. The reservoir, or compute core, must only provide sufficiently rich dynamics that are then mapped onto a low-dimensional space by an readout layer. One of the key advantages of this approach is that only the readout layer needs to be adapted to perform the desired computation. The reservoir itself remains unchanged. In this paper we use for the first time memristive components as reservoir building blocks that are assembled into device networks. Memristive components are particularly interesting for this purpose because of their non-linear and memory characteristics. In addition, they can be integrated very densely and provide rich dynamics with a few components only. We use pattern recognition and associative memory tasks to illustrate the memristive reservoir computing approach. For that purpose, we have built a software framework that allows to create valid memristor networks, to simulate and evaluate them in Ngspice, and to train the readout layer by means of a Genetic Algorithm (GA). Our results show that we can efficiently and robustly classify temporal patterns. The approach presents a promising new computing paradigm that harnesses the non-linear, time-dependent, and highly-variable properties of current memristive components for solving computational tasks.
Keywords
content-addressable storage; genetic algorithms; learning (artificial intelligence); memristors; neural nets; pattern recognition; Ngspice simulation; associative memory task; compute core; computing paradigm; feature size scaling; genetic algorithm; highly-variable properties; memristive components; memristive reservoir computing; memristor based reservoir computing; memristor network; nonBoolean computing model; nonlinear properties; nonvon Neumann computing model; pattern recognition task; readout layer; reservoir building blocks; temporal pattern classification; time-dependent properties; Computational modeling; Computer architecture; Genetic algorithms; Integrated circuit modeling; Memristors; Reservoirs; Training;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures (NANOARCH), 2012 IEEE/ACM International Symposium on
Conference_Location
Amsterdam
Print_ISBN
978-1-4503-1671-2
Type
conf
Filename
6464167
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