DocumentCode :
597613
Title :
Performance analysis and simulation of two different architectures of (6:3) and (7:3) compressors based on carbon Nano-Tube Field Effect Transistors
Author :
Mehrabi, Saeed ; Navi, K. ; Hashemipour, Omid
Author_Institution :
Dept. of Comput. Eng., Islamic Azad Univ., Tehran, Iran
fYear :
2013
fDate :
2-4 Jan. 2013
Firstpage :
322
Lastpage :
325
Abstract :
In this paper, two different architectures of (6-3) and (7-3) compressors, including the conventional topology based on full adder cells with the most interesting of those recently proposed and XOR/MUX based topology, are analyzed and compared for speed, power consumption and power-delay product at transistor-level in Carbon Nano-tube Field Effect Transistor (CNFET) technology. Simulations are carried out using Synopsys HSPICE with 32nm CNTFET technology. The results of simulation demonstrate the superiority of the XOR/MUX-based structures in terms of PDP and propagation delay around 9% and 14% respectively.
Keywords :
adders; carbon nanotube field effect transistors; logic design; CNTFET technology; Synopsys HSPICE; XOR/MUX based topology; XOR/MUX-based structures; carbon nano-tube field effect transistors; compressors; full adder cells; power consumption; power-delay product; propagation delay; size 32 nm; transistor-level; Adders; Compressors; Computer architecture; Equations; Logic gates; Multiplexing; Transistors; CNFET; Compressor; Exclusive-OR (XOR); Full Adder; Multiplexer and Nanoelectronics;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanoelectronics Conference (INEC), 2013 IEEE 5th International
Conference_Location :
Singapore
ISSN :
2159-3523
Print_ISBN :
978-1-4673-4840-9
Electronic_ISBN :
2159-3523
Type :
conf
DOI :
10.1109/INEC.2013.6466036
Filename :
6466036
Link To Document :
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