DocumentCode :
597740
Title :
Design and analysis of high speed shift register using Single clock pulse method
Author :
Rajaram, A. ; Premalatha, P. ; Sowmiya, R. ; Saravanan, S. ; Vijaysai, R.
Author_Institution :
VLSI Design, SASTRA Univ., Thanjavur, India
fYear :
2013
fDate :
4-6 Jan. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Today´s electronic devices move drastically towards high speed design feature. The traditional D-flip flop is no longer suitable for designing shift registers because of its low-speed performance. Many different types of shift registers, such as Universal Shift registers, Serial In Serial Out, Serial In Parallel Out, Parallel In Parallel Out and Parallel In Serial Out have been developed. Also, there are many low-power shift register design techniques that have been proposed. However, they are all lagging behind in high speed performances. The shift register design using Single clock pulse with Hold Mode (HM-FF) & without Hold Mode (WHM-FF) Flip Flop can be a potential solution to this problem. The shift register design using this proposed method promises to achieve tremendous improvements in performance of speed. When compared to its conventional counterparts, the proposed design is able to attain more than 41.9% reduction in over all time delay, which is targeted to Xilinx Virtex 6 devices.
Keywords :
VLSI; field programmable gate arrays; flip-flops; integrated circuit design; logic design; shift registers; HM-FF flip flop; VLSI design; WHM-FF flip flop; Xilinx Virtex 6 devices; electronic devices; high speed shift register analysis; high speed shift register design; low-power shift register design techniques; parallel in parallel out shift registers; parallel in serial out shift registers; serial in parallel out shift registers; serial in serial out shift registers; single clock pulse-with-hold mode flip flop; single clock pulse-without-hold mode flip flop; universal shift registers; very large scale integration technology; Clocks; Delay; Delay effects; Shift registers; Synchronization; Very large scale integration; High speed integrated circuit; Shift register; Single Clock pulse;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Communication and Informatics (ICCCI), 2013 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4673-2906-4
Type :
conf
DOI :
10.1109/ICCCI.2013.6466252
Filename :
6466252
Link To Document :
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