Title :
Low power L2 cache design using partially tagged bloom filter and hotline check
Author :
Mathew, Sanu ; Jagadeeswari, M.
Author_Institution :
ME VLSI Design, Sri Ramakrishna Eng. Coll., Coimbatore, India
Abstract :
Cache energy in a highly associative is consumed mostly during tag comparison. Existing tag comparison methods involve predicting either cache hit or cache miss. In this paper a multistep tag comparison L2 cache is designed using both cache hit and miss predictions. This utilizes a hot hit ratio to determine which method to apply first. A partially tagged bloom filter for cache miss predictions by checking the non-membership of the addresses and hotline check for cache hit prediction by reducing the tag comparisons. A method is proposed that reduces the tag comparisons while meeting the given performance bound and also dynamic reordering of cache hit/miss prediction methods for multistep tag comparison that can further reduce the energy consumed in tag comparison by adapting to dynamically changing cache access behavior. From the experimental results it is found that the proposed method reduces the power consumption by an average of 20% than the partial tag enhanced cache hit prediction.
Keywords :
cache storage; data structures; cache access behavior; cache energy; cache miss prediction; hotline check; low power L2 cache design; multistep tag comparison L2 cache; partial tag enhanced cache hit prediction; partially tagged Bloom filter; power consumption; tag comparison methods; Computers; Energy consumption; Informatics; Matched filters; Power demand; Prediction methods; Radiation detectors; Multistep tag comparison; bloom filter (BF); cache memory; dynamic reordering; timeout tracking;
Conference_Titel :
Computer Communication and Informatics (ICCCI), 2013 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4673-2906-4
DOI :
10.1109/ICCCI.2013.6466306