DocumentCode
597776
Title
A 1-V 1-GS/s 6-bit low-power flash ADC in 90-nm CMOS with 15.75 mW power consumption
Author
Lad, K. ; Bhat, M.S.
Author_Institution
Dept. of Electron. & Commun., Nat. Inst. Of Technol. Karnataka, Surathkal, India
fYear
2013
fDate
4-6 Jan. 2013
Firstpage
1
Lastpage
4
Abstract
A 1-V 1-GS/s 6-bit low power flash ADC in 90 nm CMOS technology is presented. Proposed Flash ADC consists of reference generator, comparator array, 1-out-of N code generator, Fat tree encoder and output D-latches. This Flash ADC achieves 5.76 ENOB at Nyquist input frequency without calibration. The measured peak INL and DNL are 0.08LSB and 0.1LSB, respectively. The proposed ADC consumes 15.75 mW from 1V supply and yielding an energy efficiency of 0.291 pJ/conv while operating at 1 GS/s.
Keywords
AC-DC power convertors; CMOS logic circuits; comparators (circuits); encoding; flip-flops; low-power electronics; power consumption; 1-out-of N code generator; CMOS technology; ENOB; Nyquist input frequency; comparator array; energy efficiency; fat tree encoder; low-power flash ADC; output D-latches; peak DNL; peak INL; power 15.75 mW; power consumption; reference generator; size 90 nm; storage capacity 6 bit; voltage 1 V; CMOS integrated circuits; CMOS technology; Generators; Inverters; Latches; Preamplifiers; Fat tree encoder; Flash ADC; Low power; Preamplifier based latch comparator;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Communication and Informatics (ICCCI), 2013 International Conference on
Conference_Location
Coimbatore
Print_ISBN
978-1-4673-2906-4
Type
conf
DOI
10.1109/ICCCI.2013.6466320
Filename
6466320
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