Title :
A proposed high manufacturability strain technology for high-k/metal gate SiGe channel UTBB CMOSFET
Author :
Wen-Kuan Yeh ; Wenqi Zhang ; Yang, Ya-Liang ; Chen, P.Y.
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
We demonstrated a high-k/metal gate-last SiGe channel ultra ultra thin body and BOX (UTBB) CMOSFET process with optimized strain technology for high performance concerns. The impact of SOI thickness and strain from Ge, CESL, and high-k material/metal-gate are inspected. An appropriate post treatment is proposed to improve quality of stack Hf-based dielectric. We achieved a high manufacturability 28nm SiGe channel UTBB Hf-based high-k/TiN-based metal-gate last CMOSFET with good VT roll-off, lower device leakage and better reliability.
Keywords :
Ge-Si alloys; MOSFET; dielectric devices; dielectric materials; hafnium; semiconductor device manufacture; semiconductor device reliability; silicon-on-insulator; titanium compounds; CESL; Hf-TiN; SOI; SiGe; channel UTBB-based high-k-based metal-gate last CMOSFET; device leakage; high manufacturability strain technology; high-k-metal-material gate channel UTBB CMOSFET process; reliability; size 28 nm; stack Hf-based dielectric; ultrathin body and BOX; High K dielectric materials; Logic gates; Metals; Silicon; Silicon germanium; Strain; Substrates;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467655
