Title :
Gap fill capability of Ni PVD based on silicide-last process
Author :
Shu-Juan Mao ; Jun Luo ; Jiang Yan
Author_Institution :
Inst. of Microelectron., Beijing, China
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
A NiSi silicide-last process is proposed for the application of high-k & metal gate integration scheme in this paper. Contact holes with aspect ratios varying from 0.3 to 2.3 are fabricated. Profiles of Ni films sputtered in contact holes with different aspect ratios are checked by cross-sectional scanning electron microscopy (SEM). After silicidation, the as-formed NiSi on the top of contact holes are also systematically characterized by cross-sectional SEM.
Keywords :
CMOS integrated circuits; high-k dielectric thin films; nickel compounds; scanning electron microscopy; vapour deposition; CMOS technology; NiSi; PVD; contact holes; cross-sectional SEM; cross-sectional scanning electron microscopy; gap fill capability; high-k integration scheme; metal gate integration scheme; silicide-last process; Films; High K dielectric materials; Logic gates; Nickel; Scanning electron microscopy; Silicides; Silicon;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467733
