• DocumentCode
    598427
  • Title

    Pipeline-based scheduling for heterogeneous multi-core systems

  • Author

    Derong Liu ; Ming´e Jing ; Yuwen Wang ; Zhiyi Yu ; Xiaoyang Zeng ; Dian Zhou

  • Author_Institution
    State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
  • fYear
    2012
  • fDate
    Oct. 29 2012-Nov. 1 2012
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This paper proposes a pipeline-based scheduling algorithm to improve the throughput for heterogeneous multi-core processors. The algorithm decreases the communication and idle time by assigning most parent-child task pairs on the same processor, and balances the work time of processors through a balance condition. The experimental results show that, on average, this algorithm with the above two techniques achieves 113.99% improvement in throughput compared to some existing algorithms.
  • Keywords
    microprocessor chips; scheduling; heterogeneous multicore system; parent-child task pair; pipeline-based scheduling; processors; Algorithm design and analysis; Conferences; Schedules; Scheduling; Scheduling algorithms; Throughput; Multi-core; Pipeline; Scheduling; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
  • Conference_Location
    Xi´an
  • Print_ISBN
    978-1-4673-2474-8
  • Type

    conf

  • DOI
    10.1109/ICSICT.2012.6467881
  • Filename
    6467881