DocumentCode :
598450
Title :
A complete Process Design Kit verification flow and platform for 28nm technology and beyond
Author :
Yanfeng Li ; Miao Li ; Waisum Wong
Author_Institution :
Platform Design Autom. Inc., Beijing, China
fYear :
2012
fDate :
Oct. 29 2012-Nov. 1 2012
Firstpage :
1
Lastpage :
4
Abstract :
Process Design Kit (PDK) is becoming extremely complex in order to address variability from different sources such as layout-dependent effects at 28nm node and beyond. The increasing importance of layout parasitic also brings more complexity into PDK verifications. This paper reports and demonstrates a verification flow and platform to qualify the advanced PDKs with focus on addressing layout-dependent effects and layout parasitic. This platform is successfully being applied for 28nm technology. Test structures and methodologies of verifying layout-dependent components and parasitic extractions are presented.
Keywords :
CMOS integrated circuits; integrated circuit layout; integrated circuit testing; CMOS technology; PDK verifications; layout parasitic; layout-dependent components; layout-dependent effects; parasitic extractions; process design kit verification flow; size 28 nm; test structures; Analytical models; Foundries; Integrated circuit modeling; Layout; Lithography; SPICE; Stress; Process Design Kit; STRAIN; layout dependent effect; variability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
Type :
conf
DOI :
10.1109/ICSICT.2012.6467921
Filename :
6467921
Link To Document :
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