DocumentCode
598963
Title
A real-time rate control scheme and hardware implementation for H.264/AVC encoders
Author
Wang, Teng ; Chen, Yingrui ; He, Yong ; Wang, Xin´an ; Zhao, Lei
Author_Institution
Key Lab of Integrated Micro-Systems Science Engineering and Applications, Peking University Shenzhen Graduate School, China
fYear
2012
fDate
16-18 Oct. 2012
Firstpage
5
Lastpage
9
Abstract
Rate control plays an important role in video encoders with the complex application environment and limited network bandwidth to obtain a better performance. According to the features of the encoded bit stream, rate control algorithm can dynamically adjust the quantization parameter in different levels of the encoding procedure. In this paper, a real-time rate control scheme for hardware implementation in H.264/AVC encoders is proposed. Different from other rate control algorithms focusing on the performance without considering the cost of hardware realization, the proposed scheme is applicable for hardware implementation with low hardware complexity. The simulation results show that the proposed scheme has lower fluctuation in video quality, and owns almost the same visual quality as that of X.264. The proposed scheme is implemented using SIMC 65nm CMOS technology with a clock frequency of 240MHz, which can be easily integrated into our low cost, real-time video encoder.
Keywords
H.264/AVC; hardware implementation; rate control; video encoding;
fLanguage
English
Publisher
ieee
Conference_Titel
Image and Signal Processing (CISP), 2012 5th International Congress on
Conference_Location
Chongqing, Sichuan, China
Print_ISBN
978-1-4673-0965-3
Type
conf
DOI
10.1109/CISP.2012.6469849
Filename
6469849
Link To Document