• DocumentCode
    599518
  • Title

    Simulation of ion implantation for CMOS 1µm using SILVACO tools

  • Author

    Boubaaya, Mohamed ; Larbi, Fayçal Hadj ; Oussalah, S.

  • Author_Institution
    Microelectron. & Nanotechnol. Div., Centre for Dev. of Adv. Technol. (CDTA), Algiers, Algeria
  • fYear
    2012
  • fDate
    16-20 Dec. 2012
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    One micron gate-length LDD-CMOS (Lightly Doped Drain - Complementary Metal Oxide Semiconductor) technology uses N and P-MOSFETs, realized on the same substrate, in a way to benefit simultaneously from a combination of their characteristics. Some regions of these transistors like the Wells and the Source/Drain are created by a reliable technique called ion implantation. The aim of this paper is to simulate the ion implantation steps included in the LDD-CMOS 1 micron process which has been acquired by CDTA ( Centre for Development of Advanced Technologies) from ISiT (Fraunhofer-Institut für Siliziumtechnologie). The process simulation framework ATHENA of the TCAD (Technology Computer Aided Design) SILVACO´s software was employed to simulate our process and extract some process technology parameters, such as P+ and N+ doping concentrations as well as the ion implantation energies and doses, and the corresponding junction depths.
  • Keywords
    CMOS integrated circuits; MOSFET; electronic engineering computing; ion implantation; technology CAD (electronics); ATHENA process simulation framework; CDTA; Centre for Development of Advanced Technologies; N+ doping concentrations; N-MOSFET; P+ doping concentrations; P-MOSFET; SILVACO tools; TCAD SILVACO software; gate-length LDD-CMOS technology; ion implantation energy; ion implantation simulation; junction depths; lightly doped drain-complementary metal oxide semiconductor technology; process technology parameters; size 1 micron; source-drain; technology computer aided design; transistors; wells; Doping profiles; Implants; Integrated circuit modeling; Ion implantation; Semiconductor device modeling; Semiconductor process modeling; Transistors; ATHENA; CMOS; TCAD simulation; ion implantation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics (ICM), 2012 24th International Conference on
  • Conference_Location
    Algiers
  • Print_ISBN
    978-1-4673-5289-5
  • Type

    conf

  • DOI
    10.1109/ICM.2012.6471381
  • Filename
    6471381