DocumentCode
599747
Title
FET twin model
Author
Ziauddin, Sheikh ; Khan, Eraj ; Imran, N.M.
Author_Institution
Dept. of Electr. & Electron. Eng., Bangladesh Univ. of Eng. & Technol., Dhaka, Bangladesh
fYear
2012
fDate
20-22 Dec. 2012
Firstpage
667
Lastpage
669
Abstract
In this paper, we present a simple but elegant idea through which a body-source shorted Field Effect Transistor (FET), either enhancement-type or depletion-type, and having either an n-channel or p-channel, can be replaced by a combination of two FETs of the same kind (twins), so that the i-v characteristics in all regions of FET operation (cut-off, triode and saturation) remain the same; even though none of the two FETs in the twin model enters the triode region.
Keywords
field effect transistors; semiconductor device models; FET twin model; I-V characteristics; body-source shorted field effect transistor; depletion-type field effect transistor; enhancement-type field effect transistor; n-channel; p-channel; Analytical models; Computational modeling; Integrated circuit modeling; Logic gates; MOSFET; Semiconductor device modeling; CMOS inverter; Field Effect Transistor; Large signal non-linear compact model; Shichman-Hodges quadratic model;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical & Computer Engineering (ICECE), 2012 7th International Conference on
Conference_Location
Dhaka
Print_ISBN
978-1-4673-1434-3
Type
conf
DOI
10.1109/ICECE.2012.6471638
Filename
6471638
Link To Document