DocumentCode
599948
Title
Hardware Prefetchers Leak: A Revisit of SVF for Cache-Timing Attacks
Author
Bhattacharya, Surya ; Rebeiro, Chester ; Mukhopadhyay, Debdeep
Author_Institution
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, Kharagpur, India
fYear
2012
fDate
1-5 Dec. 2012
Firstpage
17
Lastpage
23
Abstract
Micro-architectural features have an influence on security against cache attacks. This paper shows that modern hardware prefetchers enabled in cache memories to reduce the miss penalty, can be a source of information leakage with respect to cache-timing attacks. The work revisits the Side Channel Vulnerability Factor (SVF) proposed in ISCA¿12 and shows how to adapt the metric to assess the vulnerability of a prefetcher in cache-timing attacks. We use the modified metric denoted Timing-SVF, to show that standard prefetchers based on sequential algorithms can leak information in cache timing attacks. The findings have been established by experimental validations on a standard 128 bit cipher, called CLEFIA, designed by Sony Corporation Ltd. and used for light weight cryptography.
Keywords
cache storage; cryptography; storage management; CLEFIA bit cipher; Sony Corporation Limited; Timing-SVF metric; cache memory; cache-timing attack; hardware prefetcher; information leakage; lightweight cryptography; side channel vulnerability factor; Ciphers; Correlation; Encryption; Hardware; Prefetching; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture Workshops (MICROW), 2012 45th Annual IEEE/ACM International Symposium on
Conference_Location
Vancouver, BC
Print_ISBN
978-1-4673-4920-8
Type
conf
DOI
10.1109/MICROW.2012.13
Filename
6472487
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