Low-complexity twiddle factor generation for FFT processor

A low-complexity twiddle factor generation structure for fast Fourier transform (FFT) is proposed. In FFT, twiddle faction generation and multiplication occupies more area than the other mathematical operations. The proposed structure reduces the twiddle factor generation part by removing the redundancies in the conventional structure and compressing the twiddle factor ROM contents. With the proposed structure, the twiddle factor generation part is reduced by 32-45% compared with that of the conventional structure.