A 250-MHz 18-Mb full ternary CAM with low voltage match line sense amplifier in 65nm CMOS

Author

Hayashi, Isao ; Amano, Tetsuo ; Watanabe, N. ; Yano, Yuichiro ; Kuroda, Yoshihiro ; Shirata, Masaya ; Morizane, Sizuo ; Hayano, Koji ; Dosaka, Katsumi ; Nii, Koji ; Noda, H. ; Kawai, Hiroyuki

Author_Institution

Renesas Electron. Corp., Itami, Japan

fYear

2012

fDate

12-14 Nov. 2012

Firstpage

65

Lastpage

68

Abstract

An 18Mb full ternary CAM with low voltage match line sense amplifier (LV-MA) is designed and fabricated in 65-nm bulk CMOS process. The die size is 99.06 mm². The proposed LV-MA reduces the dynamic power consumption of match-lines to 33% compared to conventional one and realizes 42 % fast match-line sensing. The power consumption of fully paralleled search operation at 125-MHz is 5.1 W, which is 63% smaller than previous work. At 1.0V typical supply voltage, the 250-MHz search frequency is achieved.

Keywords

CMOS analogue integrated circuits; CMOS memory circuits; VHF amplifiers; VHF circuits; content-addressable storage; integrated circuit design; low-power electronics; radiofrequency integrated circuits; LV-MA; bulk CMOS process; frequency 125 MHz; frequency 250 MHz; full ternary CAM; low voltage match line sense amplifier; power 5.1 W; power consumption; size 65 nm; ternary content-addressable memory; voltage 1.0 V;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian

Conference_Location

Kobe

Type

conf

DOI

10.1109/IPEC.2012.6522628

Filename

6522628