DocumentCode :
602667
Title :
A 20Gb/s adaptive duobinary transceiver
Author :
Yu-Ming Ying ; I-Ting Lee ; Shen-Iuan Liu
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2012
fDate :
12-14 Nov. 2012
Firstpage :
129
Lastpage :
132
Abstract :
A 20Gb/s adaptive duobinary transceiver has been realized in 90-nm CMOS technology. An adaptive transmitter is realized without a feedback channel. For the channels with different lengths, the tap coefficient of the transmitter is digitally adjusted to compensate the channel loss. It achieves a data rate of 20-Gb/s with a BER less than 10-12 over 16cm-FR4 board. The transmitter and receiver consume 81mW and 38mW from a 1.5V supply, respectively. For a 20-Gb/s PRBS of 27-1, the maximum length of FR4 channel 16cm is achieved. The measured peak-to-peak jitter of the recovered data is 13.78ps.
Keywords :
CMOS integrated circuits; radio transceivers; BER; CMOS technology; FR4 board; FR4 channel; adaptive duobinary transceiver; bit rate 20 Gbit/s; channel loss compensation; power 38 mW; power 81 mW; receiver; size 90 nm; transmitter tap coefficient; voltage 1.5 V;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2012 IEEE Asian
Conference_Location :
Kobe
Type :
conf
DOI :
10.1109/IPEC.2012.6522642
Filename :
6522642
Link To Document :
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