Title :
SiGe on SOI nanowire array TFETs with homo- and heterostructure tunnel junctions
Author :
Richter, Simon ; Blaeser, Sebastian ; Knoll, Lars ; Trellenkamp, Stefan ; Schafer, Andreas ; Hartmann, J.M. ; Zhao, Q.T. ; Mantl, Siegfried
Author_Institution :
Peter-Grunberg-Inst. (PGI 9-IT), Forschungszentrum Julich, Julich, Germany
Abstract :
This paper presents experimental results on tunneling field-effect transistors (TFETs) based on SiGe on SOI nanowire arrays. A SiGe-Si heterostructure TFET with a vertical tunneling junction consisting of an in situ doped SiGe source and a Si channel is demonstrated. The device shows switching behavior over a drain current range of up to 8 orders of magnitude with a minimum slope of 90 mV/dec. A larger tunneling area results in an increase of on-current. The heterojunction TFET shows great improvement compared to a homojunction SiGe on SOI nanowire design with implanted junctions. Temperature dependent measurements and device simulations are performed in order to analyze the tunnel transport mechanism in the devices.
Keywords :
Ge-Si alloys; elemental semiconductors; high electron mobility transistors; nanofabrication; nanowires; semiconductor heterojunctions; silicon; silicon-on-insulator; tunnelling; SOI nanowire array TFET; SiGe-Si; drain current; heterojunction TFET; heterostructure tunnel junction; homojunction nanowire design; homostructure tunnel junction; temperature dependent measurement; tunnel transport mechanism; tunneling field-effect transistor; vertical tunneling junction; Lead; Logic gates; Nanoscale devices; Performance evaluation; Switches; Temperature dependence; Tunneling; SiGe; TFET; heterostructure; nanowire;
Conference_Titel :
Ultimate Integration on Silicon (ULIS), 2013 14th International Conference on
Conference_Location :
Coventry
Print_ISBN :
978-1-4673-4800-3
Electronic_ISBN :
978-1-4673-4801-0
DOI :
10.1109/ULIS.2013.6523482