DocumentCode
602975
Title
Power Integrity analysis and discrete optimization of decoupling capacitors on high speed power planes by particle swarm optimization
Author
Tripathi, J.N. ; Nagpal, R.K. ; Chhabra, N.K. ; Malik, Rohit ; Mukherjee, Jayanta ; Apte, Prakash R.
Author_Institution
Dept. of EE, IIT Bombay, Mumbai, India
fYear
2013
fDate
4-6 March 2013
Firstpage
670
Lastpage
675
Abstract
Power Integrity problem for a high speed power plane is discussed in context of selection and placement of decoupling capacitors. The s-parameters data of power plane geometry and capacitors are used for the accurate analysis including bulk capacitors and VRM, for a real world problem. The optimal capacitors and their optimum locations on the board are found using particle swarm optimization. A novel and accurate methodology is presented which can be used for any high speed Power delivery Network.
Keywords
S-parameters; capacitors; particle swarm optimisation; printed circuit design; S-parameters; VRM; bulk capacitors; decoupling capacitors; discrete optimization; high speed power delivery network; high speed power planes; particle swarm optimization; power integrity analysis; power plane geometry; voltage regulator module; Capacitors; Equations; Impedance; Optimization; Particle swarm optimization; Ports (Computers); Scattering parameters; Decoupling Capacitors; Particle Swarm Optimization (PSO); Power Delivery Networks; Power Integrity; S-parameters;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design (ISQED), 2013 14th International Symposium on
Conference_Location
Santa Clara, CA
ISSN
1948-3287
Print_ISBN
978-1-4673-4951-2
Type
conf
DOI
10.1109/ISQED.2013.6523682
Filename
6523682
Link To Document