DocumentCode
603273
Title
Data Security for EPC Gen-2: VLSI Design and Its FPGA Implementation
Author
Bag, J. ; Rajanna, K.M. ; Sarkar, Subir Kumar
Author_Institution
Jadavpur Univ., Kolkata, India
fYear
2013
fDate
6-7 April 2013
Firstpage
330
Lastpage
336
Abstract
Electronic Product Code or EPC Global class-I Generation-I and Generation-II are popular and globally accepted standard specification which enables the use of password protection for accessing the data stored in the memory of a RFID tag. Use of password gives one of the ultimate securities for the RFID system but these are not immune to ´hacking´. Hackers are adopting advance technologies like side attack, power analysis to detect data password. But in many cases it is very much important that data must be secured enough. In this paper, we propose a data security system integrated with this protocol based on programmable cellular automata. We have implemented the protocol in VHDL. A synthesizable module is presented here in this article. System efficiency is evaluated according to the implementation.
Keywords
VLSI; cellular automata; computer crime; cryptographic protocols; field programmable gate arrays; hardware description languages; logic design; product codes; radiofrequency identification; EPC Gen-2; EPC global class-I generation-I; EPC global generation-II; FPGA implementation; RFID system; RFID tag; VHDL; VLSI design; data password; data security system; electronic product code; hacking; password protection; power analysis; programmable cellular automata; protocol; standard specification; synthesizable module; system efficiency; Automata; Data security; Protocols; Radiofrequency identification; Standards; Tin; EPC Gen-2; RFID; RTL schematic; Simulation; Synthesis report; VHDL;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Computing and Communication Technologies (ACCT), 2013 Third International Conference on
Conference_Location
Rohtak
ISSN
2327-0632
Print_ISBN
978-1-4673-5965-8
Type
conf
DOI
10.1109/ACCT.2013.77
Filename
6524327
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