DocumentCode :
603486
Title :
A Machine to Evaluate Decomposed Multi-Terminal Multi-Valued Decision Diagrams for Characteristic Functions
Author :
Nakahara, H. ; Sasao, T. ; Matsuura, Motoharu
Author_Institution :
Kagoshima Univ., Kagoshima, Japan
fYear :
2013
fDate :
22-24 May 2013
Firstpage :
90
Lastpage :
95
Abstract :
A decomposed multi-terminal multi-valued decision diagrams for characteristic function(MTMDDs for CF) represents decomposed circuits. It can represent complex functions compactly. This paper shows a machine that evaluates decision diagrams. First, we introduce the decomposed MTMDDs for CF. Then, we consider two instructions to evaluate the decomposed MTMDDs for CF. Next, we show a machine that evaluates the decision diagrams. We compare that machine with embedded processors. As for the power-delay product, our machine running at 100 MHz is 60.84 times smaller than Nios II processor running at 100 MHz, and it is 18.66 times smaller than Atom N455 processor running at 1.67 GHz.
Keywords :
graph theory; microprocessor chips; performance evaluation; Atom N455 processor; CF; Nios II processor; characteristic function; complex function; decomposed MTMDD; decomposed multiterminal multivalued decision diagrams; embedded processors; power-delay product; Boolean functions; Data structures; Indexes; Logic gates; Program processors; Rails; Registers; Decision Diagrams; MPU; power-efficiency; processor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on
Conference_Location :
Toyama
ISSN :
0195-623X
Print_ISBN :
978-1-4673-6067-8
Electronic_ISBN :
0195-623X
Type :
conf
DOI :
10.1109/ISMVL.2013.6
Filename :
6524645
Link To Document :
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