Design and Evaluation of a Differential Switching Gate for Low-Voltage Applications

Author

Natsui, Masanori ; Kashiuchi, K. ; Hanyu, Takahiro

Author_Institution

Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan

fYear

2013

fDate

22-24 May 2013

Firstpage

146

Lastpage

151

Abstract

A new basic switching gate based on differential logic is proposed for implementing high-performance low-voltage VLSI. Differential switching gate operates in current domain and output voltage swing can be determined independent of supply voltage, which leads to a high frequency operation even if in a lower-supply-voltage condition. Moreover, the use of a modified pMOS load further improves the transient characteristic of the switching gate. Through an evaluation of a differential logic-based combinational circuit, a potential capability of the differential switching gate is demonstrated.

Keywords

VLSI; combinational circuits; integrated circuit design; logic design; logic gates; low-power electronics; power supply circuits; VLSI; combinational circuit; differential logic gate; differential switching gate; low-voltage application; lower-supply-voltage condition; output voltage swing; pMOS load; transient characteristic; CMOS integrated circuits; Inverters; Logic gates; Power dissipation; Switches; Switching circuits; Very large scale integration; bulk-drain connection; differential logic; low-voltage circuit; propagation delay;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic (ISMVL), 2013 IEEE 43rd International Symposium on

Conference_Location

Toyama

ISSN

0195-623X

Print_ISBN

978-1-4673-6067-8

Electronic_ISBN

0195-623X

Type

conf

DOI

10.1109/ISMVL.2013.23

Filename

6524654