Thermal simulation of integrated circuits based on a reduced-order model

A reduced-order thermal model (ROM) for integrated circuits (ICs) is developed based on proper orthogonal decomposition (POD). The developed approach requires no assumptions about the physical geometry, dimensions, or heat flow paths for any complex geometries and is able to offer detailed thermal information at a computational cost comparable to that of compact thermal models. To demonstrate its capability, the model is applied to a 2D SOI IC structure subjected to steady and dynamic heat sources. A reduction of several orders of magnitude in numerical degrees of freedom (DOF) can be achieved when using the ROM model to capture the device junction temperature, compared to detailed numerical simulation. It has been shown that steady-state and dynamic results between these 2 approaches are nearly identical.