FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies

This article describes the advantages of using the Field Programmable Gate Arrays (FPGA) for significant acceleration of Monte Carlo simulations leading to the fast verification of new ideas. An example of a real and challenging problem in the design of application specific integrated circuits (ASIC) for 2D X-ray imaging applications, namely the charge sharing effect in a highly segmented position sensor, is presented together with a detailed description of its software and hardware simulations. The implementation of the C8P1 algorithm is described at the hardware simulation level, including mathematical modeling parameters and tools used. As a result of the presented approach, simulations over 1000 times faster (compared to standard processor driven) are possible, reducing multi-dimensional simulation duration from days to minutes. The presented solution has helped identify and improve weak points in numerous versions of the C8P1 algorithm to mitigate the charge sharing effect and to implement an ASIC in ultra-deep sub-micron solution technology, which aims to improve medical, scientific and industrial X-ray imaging in terms of spectral and position sensitive measurements.