DocumentCode :
605566
Title :
FPGA based hardware architectures for high performance computing applications
Author :
Belean, Bogdan ; Pogacian, S. ; Bot, Adrian
Author_Institution :
Nat. Inst. for R&D of Isotopic & Mol. Technol., Cluj-Napoca, Romania
fYear :
2012
fDate :
25-27 Oct. 2012
Firstpage :
11
Lastpage :
14
Abstract :
The paper describes the FPGA technology together with its possibility to exploit spatial and temporal parallelism in order to develop high performance computing applications. The development of hardware architecture using FPGA technology represents a reliable solution in case of various applications where fast processing it´s mandatory. Two applications are presented where the FPGA technology is used. Thus, on one hand, automatic microarray image processing is performed using FPGA based hardware architecture, while on the other hand, an FPGA based LDPC decoder implementation is proposed in order to improve the decoder throughput compared to state of the art approaches.
Keywords :
edge detection; field programmable gate arrays; image enhancement; parallel processing; parity check codes; FPGA based LDPC decoder implementation; FPGA based hardware architectures; FPGA technology; automatic microarray image processing; edge detection; high performance computing applications; image enhancement; spatial parallelism; temporal parallelism;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Tier 2 Federation Grid, Cloud & High Performance Computing Science (RO-LCG), 2012 5th Romania
Conference_Location :
Cluj-Napoca
Print_ISBN :
978-1-4673-2242-3
Type :
conf
Filename :
6528233
Link To Document :
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