• DocumentCode
    607890
  • Title

    Hierarchical fast bidimensional empirical mode decomposition and its hardware architecture

  • Author

    Semiz, S. ; Celebi, Adem ; Urhan, O.

  • Author_Institution
    Bilisim ve Bilgi Guvenligi Ileri Teknolojiler Arastirma Merkezi(BILGEM), TUBITAK, Kocaeli, Turkey
  • fYear
    2013
  • fDate
    24-26 April 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this work, a hierarchical algorithm and a hardware architecture for bi-dimensional fast empirical mode decomposition (B-EMD) is proposed. Using the proposed low cost architecture, decomposing images, video and hyper spectral images using the power of dedicated hardware will be possible.
  • Keywords
    video signal processing; B-EMD; bidimensional fast empirical mode decomposition; decomposing images; hardware architecture; hierarchical algorithm; hierarchical fast bidimensional empirical mode decomposition; hyper spectral images; low cost architecture; video images; Abstracts; Circuits and systems; Conferences; Electroencephalography; Empirical mode decomposition; Hardware; Signal processing; EMD; Empirical Mode Decomposition; Hardware Architecture; IMF; Intrinsic Mode Function;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and Communications Applications Conference (SIU), 2013 21st
  • Conference_Location
    Haspolat
  • Print_ISBN
    978-1-4673-5562-9
  • Electronic_ISBN
    978-1-4673-5561-2
  • Type

    conf

  • DOI
    10.1109/SIU.2013.6531551
  • Filename
    6531551
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=607890